1. Field
The present invention relates generally to a method of aligning a substrate.
2. Description of the Related Art
Generally, various semiconductor fabricating processes may be performed on a semiconductor substrate to form a plurality of patterns. In order to identify whether the patterns may be normal or not, a process for inspecting the patterns may be performed between the semiconductor fabrication processes.
In order to inspect the patterns, it may be necessary to perform a process for accurately aligning the semiconductor substrate. The aligning process may include a process for moving the semiconductor substrate to align an alignment mark on a scribe lane of the semiconductor substrate with a reference coordinate predetermined set in an alignment apparatus.
According to a conventional aligning method, a first alignment mark in a first shot region may be identified. The identified alignment mark may then be aligned with a predetermined first coordinate. A second alignment mark in a second shot region, which may be located from the first shot region in an x-direction, may be identified. The identified second alignment mark may then be aligned with a predetermined second coordinate. A third alignment mark in a third shot region, which may be located from the first shot region in a y-direction, may be identified. The identified third alignment mark may then be aligned with a predetermined third coordinate. That is, only a single alignment mark in each of the shot regions may be aligned with the predetermined coordinate.
Meanwhile, when the alignment mark may not be identified, the alignment apparatus may determine the semiconductor substrate to be abnormal. The abnormal semiconductor substrate may be unloaded from the alignment apparatus. New alignment recipes may be set in the alignment apparatus. The above-mentioned aligning processes may then be performed on other semiconductor substrates to align the semiconductor substrates.
Although the alignment mark may be aligned with the predetermined coordinate, the alignment apparatus may not identify the aligned alignment mark due to an obscure image of the aligned alignment mark. According to the conventional method, the alignment apparatus may determine the semiconductor substrate having the aligned alignment mark. As a result, an alignment time of the alignment process may be too long. This may cause a low yield of semiconductor devices.
Further, only one allowable alignment score may be set as a determination standard of an alignment failure. That is, when an alignment score measured from an identified alignment mark of a semiconductor substrate may be above the allowable alignment score, the semiconductor substrate may be determined to be normally aligned. In contrast, when an alignment score measured from an identified mark of a semiconductor substrate may be below the allowable alignment score, the semiconductor substrate may be determined to be abnormally aligned. Therefore, although a semiconductor substrate may be accurately aligned, an alignment score of an alignment mark in the accurately aligned semiconductor substrate may be below the allowable alignment score due to an obscure image of the alignment mark. As a result, the accurately aligned semiconductor substrate may be determined to be abnormal.
Further, according to a related aligning method, the alignment marks in the first shot region may be identified in an order substantially the same as that in the first shot region. For example, when a third alignment mark in the first region may be identified, the third alignment mark in the second region may be identified after the first alignment mark and the second alignment mark may not be identified, although a possibility for identifying the third alignment mark in the second shot region may be higher than that for identifying the first alignment mark and the second alignment mark.
Therefore, a time for identifying the alignment mark may be increased. As a result, a time for aligning the substrate may also be increased, so that a yield of semiconductor devices may be low.